Cadence Tool Support

The following tools are supported:

	Cadence^® Silicon-Package-Board Co-Design (SPB) Version 15.5.1
	Cadence^® Design Framework II - IC5.0.33 - Full Custom IC Design.

Also, the following non-Cadence tools are available:

	Synplicity Synplify for FPGA Synthesis
	Xilinx ISE 8.1 FPGA Place and Route Tools
	Xilinx Chipscope Pro 8.1i FPGA Development Environment
	Altera MAX+PLUS II CPLD Place and Route Tools
	Altera Quartus II SOPC (System On a Programmable Chip) design Tools

To help you get started, here are some Adobe Acrobat PDF documents/tutorials from Cadence:

	Concept HDL Tutorial
	Logic Workbench Users Guide
	Programmable IC (PIC Tools) Tutorial (Excellent Document -- covers Xilinx and Altera devices)
	Library Manager Users Guide
	Library Manager Tutorial
	VHDL Simulation using Concept-HDL Front end Tutorial

You may find the Cadence University Program site helpful:

Cadence North American University Software Program

University Links

There are startup scripts located in /cds/local/ that will configure your Cadence environment. Each script configures your shell to a particular version of the Cadence tools:

/cds/local/cdsstart.spb1551 -- Cadence PCB Systems Division Tools Version 15.1

/cds/local/ldvstart -- Cadence Logic Design and Verification Tools Version 3.1

/cds/local/spwstart -- Cadence Signal Processing Worksystem Version 4.5

/cds/local/cdsstart -- Cadence System Design Solution Version 97A (Unsupported)

/cds/local/cdsstart.icc50 -- Cadence IC Craftsman Shape-Based Autorouter Version 5.0

/cds/local/cdsstart.spr40 -- Cadence Synthesis, Place & Route Tools Version 4.0 (BuildGates, PKS)

/cds/local/cdsstart.ic446 -- Cadence Full Custom IC Design, Design Framework II Version 4.4.6

/cds/local/cdsstart.vcc20 -- Cadence Virtual Component Co-Design, VCC 2.0

For example, to configure your UNIX environment to run the Version 15.1 of the PSD tools, enter the following command at the UNIX prompt:

source /cds/local/cdsstart.psd151 <return>

Your environment will now be configured to run all of the PSD15.1 tools including Analog Workbench.

The startup commands for the Cadence tools are as follows:

projmgr & <return> -- Starts the Cadence PE project manager. All other PE tools can be started from this tool.

awb <return> -- Starts Cadence Analog Workbench HDL.

The following commands startup the various non-Cadence tools:

xilinx & <return> -- Starts the Xilinx ISE Alliance tools.

altera & <return> -- Starts the Altera MAX-PLUS II CPLD tools. You must source the /cds/local/cdsstart.psd141 script to setup your environment. (We have only one license for this tool. Please check it in when you are done with it.)

synplify & <return> -- Starts the Synplify FPGA synthesis tool.

Cadence Documentation

The Cadence Performance engineering tools have built-in Windows-style help utilities. For help with Logic Design, SPW, 97A, or any of the IC Design and Verification tools, use the Cadence Openbook tool. To start openbook, configure your environment for the desired design tools, and type "openbook" at the UNIX prompt. The Openbook tool takes some time to start -- please be patient.

source /cds/local/ldvstart <return>

openbook & <return>

Please refer any suspected problems with the Cadence software to Joe Portelli at 863-7580. DO NOT contact Cadence directly for support -- they will not help you. All Cadence support must be performed through a technical liaison. Note that the Center for Electronic Design, Communications, and Computing does not provide training for Cadence software.

Last Modified Wednesday, May 17, 2006 02:38 PM - J. Portelli

This page has been accessed times since July 26th, 2000

	Cadence North American University Software Program
	University Links