Area vs. Speed
Two generally mutually exclusive goals are minimum delay and minimum area
An example using Synopsys Inc.’s tools produces the following results:
- design optimized for speed resulted in 197 gates with a critical path of 6.6ns
- design optimized for area resulted in 115 gates with a critical path of 10.9ns
- design for best characteristics for both speed and area resulted in 141 gates with a critical path of 8.2ns
Notes:
Example from [de Geus89], p. 28.
Note that third option lies between first two in both gate count and speed.
Mentor Graphics’ Autologic recommends optimizing for area first, then delay, then area again, etc.