Synthesis Process Overview
Behavioral
Simulation
Optional RTL
Simulation
Behavioral
Synthesis
Synthesis &
Test Synthesis
Gate-Level
Simulation
Gate-Level
Analysis
Place & Route
Specification
Implementation
Verification
Silicon Vendor
Silicon
Behavioral
Functional
RTL
Functional
Gate
Layout
Synopsys, Inc.
Previous slide
Next slide
Back to first slide
View graphic version
Notes:
From [Synopsys94], p. 8.