Logic Synthesis Tasks(e.g., Mentor Graphics’ AutoLogic)

• Flattening

  • Changing the combinational logic from multi-level to a two-level description

• Factorization

  • Most effective in two-level form
  • Performing Boolean factorization and reduction in the combinational logic

• Transduction

  • Reducing circuit gate-count while maintaining logical functionality by removing redundant logic

• Technology Mapping

  • Mapping truth table of a portion of the logic to the truth table of a particular cell in the target technology
  • Selects smallest cell that matches functionality

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From [MGC92].