Logic after the RegisterResulting Schematic

i0

clk

output

Q

CP

D

Mentor Graphics Corp.

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From [MGC94b] .

Putting the sensitivity (i.e., the WAIT statement) at the end of the process results in placing the logic in after the register.

The two circuits just shown have the same functionality. They illustrate that subtle differences in the schematic are possible by arbitrary choices in the synthesis tool. In this case, AutoLogic defaults to putting the logic after the register if the WAIT statement is at the end of the process, and in front of the register if the WAIT statement is at the beginning of the process. By the way, this default can be overridden by the user through the use of a configuration file. It should also be noted that AutoLogic requires that WAIT statements appear either at the beginning or at the end of a process; a sensitivity list is treated as a WAIT statement at the beginning of the process.

Also note that the circuit above would have actually been optimized by using a register with complementary outputs, thus making this code slightly more efficient than the first example.