Common Synthesis Targets

• ASICs

  • “Simple” ASIC development is greatly simplified
  • Expertise still required for aggressive speed, size, or power requirements, however

• FPGAs

  • Often the same description can be retargeted to an FPGA for a low-cost rapid-turnaround prototype to test functionality
  • Routing and layout problems similar to ASICs

• PLDs

  • Routing and layout largely replaced by design partitioning

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