Slide 50 of 173
Notes:
The next problem, currently the focus of much research, sequential circuit test generation. A sequential circuit is basically a block of combinational logic with some of its outputs fed back to the inputs via clocked flip-flops.
The problem with simply using combinational ATPG techniques on the combinational logic block is that a test may require a specific input combination on the Present State lines and the effect of the fault may be only propagated to the next state lines. In both cases, state machine analysis must be performed to determine how to drive the machine to the required Present state and how to differentiate the resulting faulty state from the normal good state.
