Review document for the final exam is linked here
Critical Design Review (CDR) Report
Due Monday 12/13/99 -- Submission Instructions:
1.) Design Overview - one page text plus top-level block diagram - briefly summarize your design problem (as per the PDR report), give any updated design information since the PDR, and indicate status of design work.
2.) Detailed Design Description - define the specific problem you have worked on (what portion of the overall design as described in part 1.) Identify how you have partitioned your problem, with supporting figures or block diagrams as appropriate. Give a detailed description of your progress to date, identify problems encountered in the design and with the design tools; identify "future work" necessary to complete the design.
3.) Supporting CAD Documentation. For each design alternative or design block, include the VHDL model, and associated (annotated) VHDL and VerilogXL simulation results as appropriate. Identify what simulations were performed, and why particular test vectors were selected. Include a few example RTL synthesis view page(s), and identify the relevant synthesis results (speed, # CLBs, etc.), as well as post place-and-route results where relevant. However, do not include excessive numbers of printed report pages. In all cases, label each attachment, and identify its significance.
Maximum page limit for the CDR report is 20 pages.
I hope you enjoyed the GUEST LECTURE by Lattice Semiconductor on Thursday 12/2. If you'd like to get in touch with either Dan Schaffer or Maureen Smerdon let me know (I have their email addresses).
Homework #4 is now posted on the HW page.
Quiz 2 & 3 solutions are posted.
Stop by the CAD TOOLs page for recent posting of UNIX tool commands and X-Term information
EE497i Class CD-ROMs are available for pickup in Room 7 EEW -- stop by during office hours to get your copy.
CURRENT HOMEWORK ASSIGNMENT:
Homework Assignment #4 is posted. See Homework page for more information.
CURRENT READING ASSIGNMENTS:
11/22/99 READ RASSP Module 43 (TEST Technology)
See reading assignment page for additional information and future reading assignments.
Last Meddled With: 10/15/04
. - D. Landis
