1. At the command prompt in your console window, type leapfrog.

2. The following window will pop-up.  The available options will be a subset of the following options if you are starting leapfrog for the first time in your account.
  Most probably, the available options for a first-time user will be the second and the third.  Select the third option and hit OK.

3.  It will take some time for a new window to appear and load fully.  The new window that will open will be:
  The above image is from a set environment.  However if you are using leapfrog for the first time, the field in Libraries (Work:flop) will be (Work:none).

The directory will be your directory in which you opened leapfrog.  Copy the VHDL code file provided into your present directory or edit a new vhdl code file.  The extension of this VHDL code file should be .vhd

Now before the code can be compiled, a local library needs to be defined in which the new design will be loaded.

4.  Select the "Libraries..." option from the Edit menu bar option.  The following window will pop up.
   

5.  From the menubar, select Edit and choose the "Add Library..." option.  The following window will appear.
 
  In the Name field, type the name of the library you want to create.  Notice that the directory indicated in the current field should be the one in which you are working (or you may want to create a library in other directory located in your home directory).

5.  In the figures shown, the working directory was /home/ee497i/checker and the working library created was flop.  On closing the window shown in step 4 the new library will appear in the window shown in step 3.  Save the change and exit the window in step 3.
    Now from the main window (Cadence Leapfrog - Simulation, in step 2), from the setup option of the pull-down menu bar, select "work library".   From that window, choose the new library you created in step 4.  The new VHDL design you create will now be located in this directory.  To be sure you can see the modules in your new work library, enable the "choose the library to work library".

6. Once you have a VHDL design in your working directory, click the mouse left button on this file and select it.  The enabled buttons in the main window (step 2 window) will change.  The third button on the "tools" bar will get enabled.  This is the compile button.  Hit the compile button.  Your design will be compiled.  Messages will appear in the bottom message block of the main window (step 2 window).  If the design is correct, you will see "0 messages, 0 errors" message.  If not, re-edit your code to get it compiled correctly.  In case an error message appears, you can get more information on the error message by selecting the "error messages" option in the "help" pull-down menu on the menu bar.
    There are numerous compiler settings.  However, it is upto you to choose which you want to enable and which to disable.  The following window shows the compiler settings for the sample VHDL file provided.
 

    The above steps will compile the VHDL programs.  Now, the next step is simulating the VHDL program files.  For the purpose of this tutorial, ensure that both the files viz. flop.vhd and flop_test_bench.vhd are compiled error free.
    To continue with the second part of the tutorial, click here.